Discrete lot sizing and scheduling problem under batch processing constraints in the semiconductor manufacturing
Discrete lot sizing and scheduling problem under batch processing constraints in the semiconductor manufacturing
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DOI:
10.1007/s00170-013-5028-4
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发表时间:
2013-05
期刊:
影响因子:
--
通讯作者:
Jun-Ho Lee;Sun Hoon Kim;Young Hoon Lee
中科院分区:
文献类型:
--
作者:
Jun-Ho Lee;Sun Hoon Kim;Young Hoon Lee
Highly advanced technology products are manufactured on the series of equipment having various characteristics and requirements. The deposition process of organic light emitting diode, for example, is performed in chambers for a long manufacturing time, while various product devices belonging to the same family can be processed in sequence before the preventive maintenance schedule or the refill of chemical gas required. The deposition process plays as a bottleneck, and its productivity of the schedule is critical to the upstream low-temperature poly silicon process and the downstream encapsulation and module processes as well. The batch family scheduling problem is formulated using the mixed-integer programming (MIP) in consideration of the family setups, lot sizing, supplementary mask tools requirements, and material exhaustion requirements. It is shown that the planning and scheduling decisions can be made simultaneously in an integrated model, and that it can be implemented in the actual manufacturing line. Through the optimized model analysis, the capacity can be enhanced by 20∼30 % without losing the throughput and demand satisfaction as well.