Finding optimal L1 cache configuration for embedded systems
Finding optimal L1 cache configuration for embedded systems
复制标题
寻找嵌入式系统的最佳 L1 缓存配置
DOI：
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发表时间：
2006
期刊：
影响因子：
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通讯作者：
S. Parameswaran
中科院分区：
文献类型：
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作者：
Andhi Janapsatya;A. Ignjatović;S. Parameswaran
现代嵌入式系统重复执行单个应用程序或一类应用程序。一种新兴的嵌入式系统设计方法使用可配置处理器，其中高速缓存大小、关联性和行大小可由设计者选择。本文给出了一种快速发现应用程序一级缓存失败率的方法。开发了能量模型和执行时间模型，以找到给定嵌入式应用程序的最佳缓存配置。使用Mediabch的基准测试，我们发现我们的方法在探索设计空间方面平均快了45倍，而仍然具有100%的准确率
Modern embedded system execute a single application or a class of applications repeatedly. A new emerging methodology of designing embedded system utilizes configurable processors where the cache size, associativity, and line size can be chosen by the designer. In this paper, a method is given to rapidly find the L1 cache miss rate of an application. An energy model and an execution time model are developed to find the best cache configuration for the given embedded application. Using benchmarks from Mediabench, we find that our method is on average 45 times faster to explore the design space, compared to Dinero IV while still having 100% accuracy