The extraction and measurement of on-die impedance for power delivery analysis
The extraction and measurement of on-die impedance for power delivery analysis
复制标题
用于功率传输分析的片上阻抗的提取和测量
DOI：
10.1109/epeps.2009.5338445
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发表时间：
2009
期刊：
影响因子：
--
通讯作者：
Yi
中科院分区：
文献类型：
--
作者：
Xiaoping Liu;Yi
供电系统噪声、电流和阻抗是芯片组/ cpu设计成功的关键性能因素。电源输出噪声受片上阻抗和电流的显著影响，即片上电网等效电阻（Rdie）、电容（Cdie）和Icc(t)。Rdie和Cdie在硅前提取和硅后测量方面一直面临挑战。本文主要研究Rdie和Cdie的提取和硅的相关。我们利用自制流、商业工具和实验室测量，对包含多个PHY块的Intel产品进行Rdie和Cdie提取对比研究，获得了良好的相关性。该工作提高了我们对内部流和商业工具的准确性的信心，从而促进了商业工具的采用，大大提高了模具网格建模的工作。
Power delivery system noise, current and impedance are the key performance factors for successful chipsets/CPUs design. Power delivery noise is significantly affected by on-die impedance and current, i.e., on-die power grid equivalent resistance (Rdie), capacitance (Cdie), and Icc(t). Rdie and Cdie have been challenging in pre-silicon extraction and post-silicon measurement. This paper focuses on Rdie and Cdie extraction and silicon correlation. We carried out Rdie and Cdie extraction comparison study for Intel products that contain several PHY blocks by using home-brew flow, a commercial tool, and lab measurement, to achieve good correlation. The work boosts our confidence in the accuracies of internal flow and commercial tool and therefore facilitates the adoption of the commercial tool to greatly improve die grid modeling effort.