Cyclic Etch/Passivation-Deposition as an All-Spatial Concept toward High-Rate Room Temperature Atomic Layer Etching

Cyclic Etch/Passivation-Deposition as an All-Spatial Concept toward High-Rate Room Temperature Atomic Layer Etching
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循环蚀刻/钝化沉积作为高速室温原子层蚀刻的全空间概念

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发表时间:
2015
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通讯作者:
W. Kessels
W. Kessels
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作者:
F. Roozeboom;van den Fj Bruele;Y. Creyghton;P. Poodt;W. Kessels

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硅中的传统 (3D) 蚀刻通常基于“博世”等离子蚀刻,具有定向 Sietch 和碳氟聚合物钝化的交替半周期。此外,浅特征蚀刻通常基于循环处理。同样,ALD 是时间复用的,具有半反应自限性的额外好处,从而能够在循环过程中逐层生长。为了加快生长速度,空间 ALD 已成功商业化,用于大气压下的大规模高速率沉积。我们为(高速率)原子层蚀刻(ALEt)设想了一个类似的空间划分蚀刻概念。通过插入惰性气体轴承“窗帘”,将反应气体限制在气体喷射器头中的各个喷射槽中,该过程从时间划分转变为空间划分。通过在这样的头部下来回往复运动衬底,可以在优化的局部压力下实现交替的蚀刻/钝化沉积循环,而无需切换压力或吹扫所需的空闲时间。全空间方法的另一个改进是使用基于 ALD 的氧化物(Al2O3、SiO2 等)作为蚀刻期间的钝化或蚀刻后的间隙填充。这种方法被称为支持空间 ALD 的 RIE,在具有成本效益的后端和前端处理方面具有工业潜力,特别是在需要最小界面、线边缘和鳍侧壁粗糙度的图案化结构中(即,选择性去除原子并保留尖角的原子级保真度)。
Conventional (3D) etching in silicon is often based on the ‘Bosch’ plasma etch with alternating half-cycles of a directional Sietch and a fluorocarbon polymer passivation. Also shallow feature etching is often based on cycled processing. Likewise, ALD is time-multiplexed, with the extra benefit of half-reactions being self-limiting, thus enabling layer-by-layer growth in a cyclic process. To speed up growth rate, spatial ALD has been successfully commercialized for large-scale and high-rate deposition at atmospheric pressure. We conceived a similar spatially-divided etch concept for (high-rate) Atomic Layer Etching (ALEt). The process is converted from time-divided into spatially-divided by inserting inert gas-bearing ‘curtains’ that confine the reactive gases to individual injection slots in a gas injector head. By reciprocating substrates back and forth under such head one can realize the alternate etching/passivation-deposition cycles at optimized local pressures, without idle times needed for switching pressure or purging. Another improvement toward an all-spatial approach is the use of ALD-based oxide (Al2O3, SiO2, etc.) as passivation during, or gap-fill after etching. This approach, called spatial ALD-enabled RIE, has industrial potential in cost-effective back-endof-line and front-end-of-line processing, especially in patterning structures requiring minimum interface, line edge and fin sidewall roughness (i.e., atomic-scale fidelity with selective removal of atoms and retention of sharp corners).