A Switched-Capacitor RF Front End With Embedded Programmable High-Order Filtering
A Switched-Capacitor RF Front End With Embedded Programmable High-Order Filtering
复制标题
具有嵌入式可编程高阶滤波的开关电容射频前端
DOI：
10.1109/rfic.2015.7337762
复制
发表时间：
2015
影响因子：
5.4
通讯作者：
P. Kinget
中科院分区：
文献类型：
--
作者：
Yang Xu;P. Kinget
我们提出了一种开关电容射频（RF）前端，实现等效的高阶，可调谐，高度线性RF滤波，以提高带外（OB）阻滞剂容限。RF输入阻抗匹配、n路滤波、高阶离散时间无限脉冲响应（IIR）滤波和下变频仅使用0.1-0.7 GHz原型中的开关和电容器实现，具有可调谐中心频率、可编程滤波器阶数和对OB阻滞剂的高容错性。40 nm CMOS前端功耗为38.5-76.5 mA，增益为40 dB， obiip3为24 dBm，阻塞压缩点（B1dB）为14.7 dBm，阻塞偏移为30 MHz，噪声系数为6.8-9.7 dB，校准谐波抑制比为> 66 dB。
We propose a switched-capacitor radio-frequency (RF) front end achieving an equivalent high-order, tunable, highly linear RF filtering to improve the out-of-band (OB) blocker tolerance. RF input impedance matching, N-path filtering, high-order discrete-time infinite-impulse response (IIR) filtering, and down-conversion are implemented using only switches and capacitors in a 0.1-0.7 GHz prototype with tunable center frequency, programmable filter order, and very high tolerance for OB blockers. The 40 nm CMOS frontend consumes 38.5-76.5 mA, achieves 40 dB gain, 24 dBm OB IIP3, 14.7 dBm 1 dB blocker compression point (B1dB) for a 30 MHz blocker offset, 6.8-9.7 dB noise figure, and > 66 dB calibrated harmonic rejection ratio.