Towards efficient neural networks on-a-chip: Joint hardware-algorithm approaches

Towards efficient neural networks on-a-chip: Joint hardware-algorithm approaches
复制标题

迈向高效的片上神经网络:联合硬件算法方法

DOI:
--
复制
发表时间:
2019
期刊:
China Semiconductor Technology International Conference
影响因子:
--
通讯作者:
Cao, Y.
Cao, Y.
中科院分区:
--
文献类型:
--
作者:
Du, X.;Krishnan, G.;Mohanty, A.;Li, Z.;Charan, G.;Cao, Y.

文献摘要

相似文献