A 720p H.264/AVC decoder ASIC implementation for digital television set-top boxes

A 720p H.264/AVC decoder ASIC implementation for digital television set-top boxes
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用于数字电视机顶盒的 720p H.264/AVC 解码器 ASIC 实现

DOI:
10.1145/1854153.1854196
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发表时间:
2010
期刊:
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影响因子:
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通讯作者:
S. Bampi
S. Bampi
中科院分区:
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文献类型:
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作者:
A. Bonatto;A. Soares;A. Renner;A. Susin;L. M. Silva;S. Bampi

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本文介绍了一个系统芯片的数字电视机顶盒符合巴西数字电视标准(SBTVD)的发展。根据该系统,视频、音频和数据信息被混合并在相同的广播信道上传输,并且在机顶盒上运行的HW和SW处理恢复视频、音频和数据信息。巴西的系统已分别采用H.264/AVC和MPEG-4/AAC标准进行视频和音频编码。这种复杂系统的硬件开发最初集中于开发用于HD 720 p仅帧内视频解码的FPGA原型,这是计算要求更高的硬件处理单元,需要更多的数据带宽。它已被合成到Xilinx Virtex-II Pro FPGA,使用17.308 LUT以50 Mhz运行,并在原型板上进行了验证,可以真实的实时解码HD 720 p视频流。它还使用TSMC 0.18¼m 6金属层CMOS技术实现标准单元。因此,设计了一个ASIC布局,在2.8 x 2.8 mm 2的面积内具有5 KB的片上SRAM和150 K的等效门。该实现能够以30 fps的速度解码720 p视频,频率为50 MHz,估计功耗为11.4 mW,并已使用Cadence,Synopsys和Mentor Graphics EDA工具使用相同的视频流进行了验证。
This paper presents the development of a system-on-chip for the digital television set-top box compliant to the Brazilian Digital Television Standard (SBTVD). According to this system, video, audio and data information are mixed and transmitted over the same broadcasting channel and HW and SW processes running on a set-top box recover the video, audio and data information. The Brazilian system has adopted the H.264/AVC and MPEG-4/AAC standards for video and audio coding respectively. The development of hardware for such a complex system is initially focused on the development of an FPGA prototype for HD 720p intra-only video decoding, which is the more computational demanding hardware processing unit and requires more data bandwidth. It has been synthesized to a Xilinx Virtex-II Pro FPGA using 17.308 LUTs running at 50 Mhz and it was validated in a prototyping board decoding HD 720p video streams in real time. It was also implemented to standard-cells using a TSMC 0.18¼m 6 metal layers CMOS technology. As a result, it was designed an ASIC layout with 5KB of on-chip SRAM and 150K equivalent-gates in a 2.8 x 2.8 mm2 area. This implementation is capable to decode a 720p video with 30fps with a frequency of 50 MHz with an estimated power consumption of 11.4 mW and has been validated using the same video streams using Cadence, Synopsys and Mentor Graphics EDA tools.