Hybrid Analog-Digital In-Memory Computing
Hybrid Analog-Digital In-Memory Computing
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DOI：
10.1109/iccad51958.2021.9643526
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发表时间：
2021-11
期刊：
影响因子：
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通讯作者：
M. Rashed;Sumit Kumar Jha;Rickard Ewetz
中科院分区：
文献类型：
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作者：
M. Rashed;Sumit Kumar Jha;Rickard Ewetz
今天的高性能计算(HPC)系统受到处理单元和存储单元之间昂贵的数据移动的限制。一种新兴的解决方案策略是使用非易失性存储器执行内存计算(IMC)。然而，最先进的内存计算模式无法同时提供高精度和高能效。模拟内存计算非常节能，但天生就容易出错。相比之下，基于布尔逻辑的数字内存计算对错误具有健壮性，但能效较低。在本文中，我们提出了一种新的范式，称为模拟-数字混合内存计算。文中还提出了使用该范式执行计算所需的相关内存计算平台和设计自动化工具链。该范式能够以高能量效率和高精度执行矩阵-向量乘法。该范式的关键思想是首先将所需计算的最高有效位(MSB)分解为布尔函数，将最低有效位(LSB)分解为矩阵向量乘法运算。接下来，将操作分别映射到数字和模拟内存中计算硬件。使用结构工程、数学和统计学领域的应用程序对所提出的范例进行了评估。与模拟内存计算相比，该范式能够满足计算精度的要求。与数字内存计算相比，系统、功耗、速度和面积分别提高了2.44倍、2.45倍和2.32倍。
Today's high performance computing (HPC) systems are limited by the expensive data movement between processing and memory units. An emerging solution strategy is to perform in-memory computing (IMC) using non-volatile memory. However, state-of-the-art in-memory computing paradigms fail to simultaneously deliver high precision and high energy-efficiency. Analog in-memory computing is extremely energy-efficient but inherently vulnerable to errors. In contrast, digital in-memory computing based on Boolean logic is robust to errors but less energy-efficient. In this paper, we propose a new paradigm called hybrid analog-digital in-memory computing. The paper also proposes the associated in-memory computing platform and design automation tool chain needed to perform computation using the paradigm. The paradigm is capable of performing matrix-vector multiplication with both high energy-efficiency and precision. The key idea of the paradigm is to first decompose the most significant bits (MSBs) of the desired computation into Boolean functions and the least significant bits (LSBs) into matrix-vector multiplication operations. Next, the operations are mapped to digital and analog in-memory computing hardware, respectively. The proposed paradigm is evaluated using applications from the domains of structural engineering, mathematics, and statistics. Compared with analog in-memory computing, the proposed paradigm is capable of meeting the constraints on the computational accuracy. Compared with digital in-memory computing, systems, power, speed, and area are respectively improved with 2.44X, 2.45X and 2.32X.