Ultrawide-band tunable true-time delay lines using ferroelectric varactors
Ultrawide-band tunable true-time delay lines using ferroelectric varactors
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DOI：
10.1109/tmtt.2005.848805
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发表时间：
2005-06
影响因子：
4.3
通讯作者：
D. Kuylenstierna;A. Vorobiev;P. Linnér;S. Gevorgian
中科院分区：
文献类型：
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作者：
D. Kuylenstierna;A. Vorobiev;P. Linnér;S. Gevorgian
报道了一种基于高阻硅基铁电（Ba/sub 0.25/Sr/sub 0.75/TiO/sub 3/）变容管的紧凑型可调谐实时延迟线。延迟线基于集总元件，物理上实现为合成共面带状线。本文提出了一种对/spl omega//spl ratio/0完全有效的近似解析设计方法。所制造的延迟线的物理尺寸为2.0/spl times/0.33 mm/sup 2/，包括偏置焊盘。从室温（RT）到80 K进行测量。测量结果揭示了超宽带特性的群延迟和插入损耗。在室温下，绝对群时延为/spl τ//sub /spl delta//（RT，0 V）/spl ap/70 ps，在20 V直流偏压下可调谐率为20%，插入小于3.5 dB，反射损耗优于12 dB。在145 K时，绝对群延迟增加到/spl tau//sub /spl delta//（145 K，0 V）/spl ap/100 ps，在20 V外加偏压下可调谐性为50%。在7 GHz时，插入损耗为3 dB，导致优值为0.03 dB/ps和50 ps/mm。RT时的漏电流小于0.1 /spl mu/A。
This paper reports on compact tunable true-time delay lines based on ferroelectric (Ba/sub 0.25/Sr/sub 0.75/TiO/sub 3/) varactors integrated on high-resistivity silicon. The delay lines are based on lumped elements, physically implemented as synthetic coplanar-strip lines. An approximate analytical design procedure, exactly valid for /spl omega//spl rarr/0, is proposed. The physical size of the fabricated delay lines is 2.0/spl times/0.33 mm/sup 2/, including bias pads. Measurements are performed from room temperature (RT) down to 80 K. The measurements reveal ultrawide-band characteristics for both group delay and insertion loss. At RT, the absolute group delay is /spl tau//sub /spl delta//(RT, 0 V) /spl ap/70 ps with tunability of 20% under 20-V dc bias, the insertion less than 3.5 dB, and the reflection loss better than 12 dB below 20 GHz. At 145 K, the absolute group delay is increased to /spl tau//sub /spl delta//(145 K, 0 V) /spl ap/100 ps with a tunability of 50% under 20-V applied bias. At 7 GHz, the insertion loss is 3 dB, resulting in figures-of-merit of 0.03 dB/ps and 50 ps/mm. The leakage current at RT is less than 0.1 /spl mu/A.