A CMOS 4 ch*1 k time memory LSI with 1 ns resolution
A CMOS 4 ch*1 k time memory LSI with 1 ns resolution
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分辨率为 1 ns 的 CMOS 4 ch*1 k 时间存储器LSI
DOI:
10.1109/cicc.1991.164077
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发表时间:
1991
期刊:
影响因子:
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通讯作者:
K. Endo
中科院分区:
文献类型:
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作者:
Y. Arai;T. Matsumura;K. Endo
A four-channel 1024-b time-to-digital converter chip which records input signals to memory cells at 1-ns intervals, has been developed. The chip was fabricated using 0.8- mu m CMOS technology on a 5-mm by 5.6-mm die. It dissipates only 7 mW/channel under typical operating conditions. Tests show that overall linearity and stability are very good.<<ETX>>