CMOS compatible monolithic multi-layer Si3N4-on-SOI platform for low-loss high performance silicon photonics dense integration
CMOS compatible monolithic multi-layer Si3N4-on-SOI platform for low-loss high performance silicon photonics dense integration
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DOI：
10.1364/oe.22.021859
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发表时间：
2014-09-08
期刊：
影响因子：
3.8
通讯作者：
Lo, Guo-Qiang
中科院分区：
文献类型：
--
作者：
Huang, Ying;Song, Junfeng;Lo, Guo-Qiang
我们展示了一个低损耗CMOS兼容的多层平台，使用单片后端线（BEOL）集成。在1580 nm波长处测量了PECVD氮化硅波导的传输损耗为0.8dB/cm。在1270 nm波长处，损耗进一步降低到0.24dB/cm，证明了该平台在O波段工作的可行性。设计了一种层间跃迁耦合器，在70 nm带宽上实现了小于0.2dB/跃迁损耗。这是有史以来报道的最低层间过渡损耗。该平台还集成了一个热调谐微环滤波器，其性能可与SOI平台上的同类器件相媲美。(C)2014年美国光学学会
We demonstrated a low-loss CMOS-compatible multi-layer platform using monolithic back-end-of-line (BEOL) integration. 0.8dB/cm propagation loss is measured for the PECVD Si3N4 waveguide at 1580nm wavelength. The loss is further reduced to 0.24dB/cm at 1270nm wavelength, justifying the platform's feasibility for O-band operation. An inter-layer transition coupler is designed, achieving less than 0.2dB/transition loss across 70nm bandwidth. This is the lowest inter-layer transition loss ever reported. A thermally tuned micro-ring filter is also integrated on the platform, with performance comparable to similar device on SOI platform. (C) 2014 Optical Society of America