Transistor-level oriented calculation of reliability for generalized gates based on PTM
Transistor-level oriented calculation of reliability for generalized gates based on PTM
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DOI：
10.1360/n112014-00107
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发表时间：
2014-10
影响因子：
4.9
通讯作者：
Jie Xiao;Jianhui Jiang;Jiarong Liang
中科院分区：
文献类型：
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作者：
Jie Xiao;Jianhui Jiang;Jiarong Liang
当广义门的不精确可靠性应用于门级或高层电路时，由于尺度效应等原因，误差容易被过度放大，导致结果不可靠。本文选择PTM模型，通过对门级电路可靠性的精确估计，证明了该模型的有效性，在晶体管级精确计算了广义门的结构可靠性，分析了晶体管级广义门的结构逻辑抽象，并将其转换为与转换前的逻辑抽象具有相同功能的门级结构逻辑抽象;提取电路元件的失效点和主要故障模式，构造相应的面向故障的概率转移矩阵，根据串并联电路元件的特点，采用门级PTM方法计算输入信号故障条件下晶体管级广义门的结构可靠度。对典型广义门的仿真结果验证了该方法的有效性，并分析了广义门可靠性与这些主要故障类型的关系，得到了一些有趣的结果。
When the imprecise reliability of generalized gates is applied to the gate-level or high-level circuits, the errors could be easily over enlarged for the scale effect and other reasons, which leads to unreliable results. In this paper, the PTM model, which the effectiveness was proved by accurate gate-level circuit reliability estimation, was chosen to accurately calculate the structure reliability of generalized gates at the transistor-level; the structure logistic abstract of transistor-level generalized gates is analyzed and transformed into the style of gate-level structure logistic abstract having the same function with the pre-transform one; the failure points of circuit components and the main fault modes are extracted, and the corresponding probabilistic transfer matrixes oriented to faults are constructed; according to the characteristics of series-parallel circuit components, the structure reliabilities of transistor-level generalized gates are calculated by the gate-level PTM method under the fault conditions on input signals. Simulation results for typical generalized gates demonstrate the effectiveness of the proposed method; furthermore, the relation between generalized gates reliability and these main types faults is analyzed, and some interesting results are got.