Pushing On-chip Memories Beyond Reliability Boundaries in Micropower Machine Learning Applications
Pushing On-chip Memories Beyond Reliability Boundaries in Micropower Machine Learning Applications
复制标题
在微功耗机器学习应用中推动片上存储器超越可靠性界限
DOI：
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发表时间：
2019
期刊：
影响因子：
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通讯作者：
L. Benini
中科院分区：
文献类型：
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作者：
Alfio Di Mauro;Francesco Conti;Pasquale Davide Schiavone;D. Rossi;L. Benini
在当今的深度神经网络 (DNN) 加速器中，内存访问主导着推理能量。我们分析片上存储器的电压超标度，并探索能源效率和可靠性之间的权衡，以实现稳健且计算高效的深度二元神经网络 (BNN)。采用 FDX22 技术制造的 BNN 加速器（片上 SRAM 电压降至 0.4V（远低于 0.8V 标称 Vdd））的实验结果表明，在端到端分类精度下降可忽略不计的情况下，能效显着提高（2.3 倍）。
Memory access dominates inference energy in today’s Deep Neural Network (DNN) accelerators. We analyze voltage over-scaling for on-chip memories and explore the trade-off between energy efficiency and reliability for robust and computationally efficient deep Binary Neural Networks (BNNs). Experimental results on a BNN accelerator fabricated in FDX22 technology with on-chip SRAMs powered down to 0.4V (well below the 0.8V nominal Vdd) demonstrate major energy efficiency improvements (2.3x) at negligible end-to-end classification accuracy degradation.