Predictable dynamic instruction scratchpad for simultaneous multithreaded processors
Predictable dynamic instruction scratchpad for simultaneous multithreaded processors
复制标题
用于同步多线程处理器的可预测动态指令暂存器
作者：
Stefan Metzlaff;S. Uhrig;Jörg Mische;T. Ungerer
对于硬实时应用的精确时序分析，可预测的存储系统是特别重要的。缓存对性能有很大的影响，但代价是降低了时序的可预测性。传统的暂存器，即静态管理的片上存储器，提供可预测的存储器访问，但它们通常被很差地利用。为可预测性而设计的动态管理的暂存器允许更好的内存利用率。在本文中，我们提出了一个功能暂存器，在硬件中动态管理，并提供了一个可预测的定时行为。暂存器功能利用了一个同步的多线程架构，以增加管道和内存带宽的利用率，同时保持可预测性。
For precise timing analysis of hard-real applications a predictable memory system is of particular importance. Caches have a great impact on performance, but at the cost of reduced timing predictability. Conventional scratchpads, i.e. statically managed on-chip memories, provide predictable memory accesses, but they are usually badly utilized. Better memory utilization is allowed by dynamically managed scratchpads that are designed for predictability. In this paper we propose a function scratchpad that is dynamically managed in hardware and provides a predictable timing behavior. The function scratchpad exploits a simultaneous multithreaded architecture to increase the pipeline and memory bandwidth utilization while preserving predictability.
利用执行硬实时线程的有序 SMT 处理器的备用资源
DOI：
10.1109/iccd.2008.4751887
发表时间：
2008
期刊：
2008 IEEE International Conference on Computer Design
影响因子：
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作者：
Jörg Mische;Sascha Uhrig;Florian Kluge;Theo Ungerer
通讯作者：
Theo Ungerer