Tunnel Barrier Engineering for Non-Volatile Memory
Tunnel Barrier Engineering for Non-Volatile Memory
复制标题
非易失性存储器的隧道屏障工程
DOI：
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发表时间：
2008
期刊：
影响因子：
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通讯作者：
W. Cho
中科院分区：
文献类型：
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作者：
Jongwan Jung;W. Cho
如果仍然需要十年的数据保持，非易失性存储器（NVM）器件的隧道氧化物将很难缩小规模。这一要求限制了器件性能在编程速度和工作电压方面的进一步提高。因此，对于诸如NAND的具有Fowler-Nordheim编程的低功率应用，编程和擦除电压基本上维持在不可接受的高电平。隧道氧化物缩放的一个有前途的解决方案是隧道势垒工程（TBE），它使用多个电介质堆叠来增强场敏感性。这允许比单个SiO2隧道氧化物更短的写入/擦除时间和/或更低的操作电压，而不改变十年的数据保留约束。本文比较了隧道势垒工程的两种方法：顶部势垒和可变氧化层厚度。TBE的关键结果和它的NVM的应用也被处理。
Tunnel oxide of non-volatile memory (NVM) devices would be very difficult to downscale if ten-year data retention were still needed. This requirement limits further improvement of device performance in terms of programming speed and operating voltages. Consequently, for low-power applications with Fowler-Nordheim programming such as NAND, program and erase voltages are essentially sustained at unacceptably high levels. A promising solution for tunnel oxide scaling is tunnel barrier engineering (TBE), which uses multiple dielectric stacks to enhance field-sensitivity. This allows for shorter writing/erasing times and/or lower operating voltages than single SiO₂ tunnel oxide without altering the ten-year data retention constraint. In this paper, two approaches for tunnel barrier engineering are compared: the crested barrier and variable oxide thickness. Key results of TBE and its applications for NVM are also addressed.