Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
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FPGA 中的动态硬件插件，具有部分运行时重新配置功能
DOI：
10.1109/dac.2002.1012647
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发表时间：
2002
期刊：
影响因子：
--
通讯作者：
D. Parlour
中科院分区：
文献类型：
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作者：
E. Horta;J. Lockwood;David E. Taylor;D. Parlour
已经开发了工具和设计方法来支持现场可编程端口扩展器上的部分运行时重新配置FPGA逻辑。该平台上的高速互联网分组处理电路被实现为适合于FPGA设备的特定区域的动态硬件插件(DHP)模块。PARBIT工具的开发是为了将标准计算机辅助设计工具创建的位文件转换和重组为编程DHP的部分位流。该方法允许平台对特定于应用的DHP模块进行热插拔，而不会干扰系统其余部分的运行。
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet processing circuits on this platform are implemented as Dynamic Hardware Plugin (DHP) modules that fit within a specific region of an FPGA device. The PARBIT tool has been developed to transform and restructure bitfiles created by standard computer aided design tools into partial bitsteams that program DHPs. The methodology allows the platform to hot-swap application-specific DHP modules without disturbing the operation of the rest of the system.