CHiRP: Control-Flow History Reuse Prediction

CHiRP: Control-Flow History Reuse Prediction
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DOI:
10.1109/micro50266.2020.00023
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发表时间:
2020-10
期刊:
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
影响因子:
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通讯作者:
Samira Mirbagher Ajorpaz;Elba Garza;Gilles A. Pokam;Daniel A. Jiménez
Samira Mirbagher Ajorpaz;Elba Garza;Gilles A. Pokam;Daniel A. Jiménez
中科院分区:
其他
文献类型:
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作者:
Samira Mirbagher Ajorpaz;Elba Garza;Gilles A. Pokam;Daniel A. Jiménez

文献摘要

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翻译后备缓冲器(TLB)在硬件支持的内存虚拟化中起着关键作用。为了加速地址转换并减少代价高昂的页表遍历,TLB会缓存少量最近使用过的虚拟地址到物理地址的转换。TLB必须充分利用其有限的容量。因此,重用潜力低的TLB条目应该被更有用的条目替换。本文对TLB管理中一个在文献中很少受到关注的方面——替换策略做出了贡献。我们展示了如何针对TLB定制预测性替换策略以降低缺失率并提高整体性能。 我们首先将最近提出的预测性缓存替换策略应用于TLB。我们表明,如果不考虑TLB的特定行为,这些策略效果不佳。接下来,我们引入一种新颖的以TLB为重点的预测策略——控制流历史重用预测(CHIRP)。该策略使用与已知TLB行为相关的历史特征和替换算法,性能优于其他策略。 对于一个具有4KB页面大小的1024项8路组相联的二级TLB,我们表明,与最近最少使用(LRU)策略相比,CHIRP将每1000条指令的缺失次数(MPKI)平均降低了28.21%,优于静态重引用间隔预测(SRRIP)[1]、全局历史重用策略(GHRP)[2]和SHIP[3],它们分别将MPKI平均降低了10.36%、9.03%和0.88%。
Translation Lookaside Buffers (TLBs) play a critical role in hardware-supported memory virtualization. To speed up address translation and reduce costly page table walks, TLBs cache a small number of recently-used virtual-to-physical address translations. TLBs must make the best use of their limited capacities. Thus, TLB entries with low potential for reuse should be replaced by more useful entries. This paper contributes to an aspect of TLB management that has received little attention in the literature: replacement policy. We show how predictive replacement policies can be tailored toward TLBs to reduce miss rates and improve overall performance.We begin by applying recently proposed predictive cache replacement policies to the TLB. We show these policies do not work well without considering specific TLB behavior. Next, we introduce a novel TLB-focused predictive policy, Control-flow History Reuse Prediction (CHIRP). This policy uses a history signature and replacement algorithm that correlates to known TLB behavior, outperforming other policies.For a 1024-entry 8-way set-associative L2 TLB with a 4KB page size, we show that CHiRP reduces misses per 1000 instructions (MPKI) by an average 28.21% over the least-recently-used (LRU) policy, outperforming Static Re-reference Interval Prediction (SRRIP) [1], Global History Reuse Policy (GHRP) [2] and SHiP [3], which reduce MPKI by an average of 10.36%, 9.03% and 0.88%, respectively.