Delay insensitive RSFQ circuits with zero static power dissipation
Delay insensitive RSFQ circuits with zero static power dissipation
复制标题
具有零静态功耗的延迟不敏感 RSFQ 电路
DOI：
10.1109/77.783793
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发表时间：
1999
影响因子：
1.8
通讯作者：
S. Polonsky
中科院分区：
文献类型：
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作者：
S. Polonsky
RSFQ电路中的总功耗由动态和静态两部分组成。动态功率耗散在执行有用的逻辑和数据传输操作的约瑟夫森结中。这种耗散是基本的，与数据速率成比例（在4 K时，每比特10/sup-18/焦耳的量级）。静态功率消耗在RSFQ电路使用的电阻中，用于在约瑟夫森结之间分配直流偏置电流。这部分耗散不是RSFQ电路固有的，原则上可以消除。这项工作的目标是表明，延迟不敏感（DI）RSFQ原语可以修改，使电阻不再需要在直流电源分配网络，使片上静态功耗是不存在的。在这份报告中，我们提出了这些原语的原理图，定义了允许无电阻电流分配网络的电路类，并制定了该网络的设计要求。
Total power dissipation in RSFQ circuits consists of two parts, dynamic and static. Dynamic power is dissipated in Josephson junctions performing useful logical and data transmission operations. This dissipation is fundamental and proportional to the data rate (at 4 K, of the order of 10/sup -18/ Joule per bit). Static power is dissipated in resistors used by RSFQ circuits to distribute dc bias current between Josephson junctions. This part of dissipation is not intrinsic to RSFQ circuits and in principle can be eliminated. The goal of this work is to show that Delay Insensitive (DI) RSFQ primitives can be modified so that resistors are no longer required in the dc power supply distribution network, so that the on-chip static power dissipation is absent. In this report we present the schematics for such primitives, define the class of circuits that allow resistor-free current distribution network, and formulate the requirements to the design of this network.