FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs
FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs
复制标题
FORTIS：建立前向信任以保护 IP 和 IC 的综合解决方案
DOI：
10.1145/2893183
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发表时间：
2016
期刊：
影响因子：
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通讯作者：
M. Tehranipoor
中科院分区：
文献类型：
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作者：
Ujjwal Guin;Qihang Shi;Domenic Forte;M. Tehranipoor
随着半导体行业全球化的到来，有必要防止未经授权使用第三方IP(3PIP)、克隆和恶意修改3PIP以及未经授权生产IC。由于集成电路的日益复杂，片上系统(SoC)设计者在他们的设计中使用各种3PIP来减少上市时间和开发成本，这在SoC设计者和IP拥有者之间产生了信任问题。此外，由于IC是在全球范围内制造的，SoC设计者将制造合同交给离岸铸造厂来制造IC，并且几乎无法控制制造过程，包括制造的芯片总数。类似地，3PIP拥有者缺乏对SoC中制造芯片的数量和/或其IP的使用的控制。现有的研究只部分解决了知识产权盗版和集成电路生产过剩的问题，据我们所知，还没有研究过知识产权过度使用的问题。在这篇文章中，我们提出了一种全面的解决方案，通过确保参与SoC设计和制造过程的所有实体之间的向前信任来防止IP盗版和IC生产过剩。我们提出了一种新的设计流程，以防止IC过度生产和IP过度使用。我们使用现有的逻辑加密技术来混淆SoC或3PIP的网表，并提出了一种修改方案，以允许在芯片激活之前进行制造测试，这对于防止生产过剩是绝对必要的。我们使用非对称和对称密钥加密，以类似于PGP(Pretty Good Privacy)的方式，将密钥从SoC设计者或3PIP所有者传输到芯片。此外，我们还建议将IP摘要(整个IP的加密散列)附加到IP的头部，以防止SoC设计者对IP进行修改。我们已经证明，我们的方法以最小的面积开销代价抵抗各种攻击。
With the advent of globalization in the semiconductor industry, it is necessary to prevent unauthorized usage of third-party IPs (3PIPs), cloning and unwanted modification of 3PIPs, and unauthorized production of ICs. Due to the increasing complexity of ICs, system-on-chip (SoC) designers use various 3PIPs in their design to reduce time-to-market and development costs, which creates a trust issue between the SoC designer and the IP owners. In addition, as the ICs are fabricated around the globe, the SoC designers give fabrication contracts to offshore foundries to manufacture ICs and have little control over the fabrication process, including the total number of chips fabricated. Similarly, the 3PIP owners lack control over the number of fabricated chips and/or the usage of their IPs in an SoC. Existing research only partially addresses the problems of IP piracy and IC overproduction, and to the best of our knowledge, there is no work that considers IP overuse. In this article, we present a comprehensive solution for preventing IP piracy and IC overproduction by assuring forward trust between all entities involved in the SoC design and fabrication process. We propose a novel design flow to prevent IC overproduction and IP overuse. We use an existing logic encryption technique to obfuscate the netlist of an SoC or a 3PIP and propose a modification to enable manufacturing tests before the activation of chips which is absolutely necessary to prevent overproduction. We have used asymmetric and symmetric key encryption, in a fashion similar to Pretty Good Privacy (PGP), to transfer keys from the SoC designer or 3PIP owners to the chips. In addition, we also propose to attach an IP digest (a cryptographic hash of the entire IP) to the header of an IP to prevent modification of the IP by the SoC designers. We have shown that our approach is resistant to various attacks with the cost of minimal area overhead.