Stress distribution under electroless nickel bumps extracted using arrays of 7×7 piezo-FETs
Stress distribution under electroless nickel bumps extracted using arrays of 7×7 piezo-FETs
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使用 7×7 压电 FET 阵列提取的化学镀镍凸块下的应力分布
DOI：
10.1109/icsens.2010.5690152
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发表时间：
2010
期刊：
影响因子：
--
通讯作者：
O. Paul
中科院分区：
文献类型：
--
作者：
B. Lemke;R. Baskaran;S. Ganapathysubramanian;O. Paul
本文介绍了基于CMOS的7×7的n型和p型压阻式场效应晶体管（压阻场效应管）应力传感器的高密度阵列，其间距为23 µm，用于提取化学镀镍凸块下的面内正应力差σ<sub>xx</sub> - σ<sub>yy</sub> 和面内剪应力σ<sub>xy</sub> 的分布。首次展示了由钝化层开口引起的预沉积应力、化学镀镍凸块沉积引起的应力以及在50°C至200°C之间退火过程中的应力重新分布。凸块沉积引入的σ<sub>xx</sub> - σ<sub>yy</sub>的典型值为±25 MPa。在高达200°C的退火步骤中，这些值进一步增加了高达60%。在115°C退火过程中对机械应力重新分布的原位监测表明，在180分钟内材料复合物因σ<sub>xx</sub> - σ<sub>yy</sub> = ±2.5 MPa而松弛。发现在热循环过程中应力分量的变化与温度呈线性关系，导致在沉积温度下几乎处于无应力状态。
This paper presents CMOS-based, high density arrays of 7×7 n- and p-type piezoresistive field effect transistor (piezo-FET) based stress sensors with a pitch of 23 µm for extracting the distribution of the in-plane normal stress difference σ<inf>xx</inf> - σ<inf>yy</inf> and the in-plane shear stress σ<inf>xy</inf> under electroless Ni bumps. For the first time, pre-deposition stress caused by openings in the passivation, stress induced by the electroless Ni bump deposition, and stress redistributions during annealing processes between 50 °C and 200 °C are presented. Typical values of σ<inf>xx</inf> - σ<inf>yy</inf> = ±25 MPa are introduced by bump deposition. These values are further increased by up to 60% during annealing steps of up to 200 °C. The in-situ monitoring of the mechanical stress redistribution during an anneal at 115 °C shows a relaxation of the material compound by σ<inf>xx</inf> - σ<inf>yy</inf> = ±2.5 MPa over 180 min. The change of the stress components is found to be linear with temperature during thermal cycling resulting in an almost stress-free state at the deposition temperature.