Fast substrate noise driven floorplanning for mixed-signal circuits considering symmetry constraints
Fast substrate noise driven floorplanning for mixed-signal circuits considering symmetry constraints
复制标题
考虑对称约束的混合信号电路的快速衬底噪声驱动布局规划
DOI：
10.1109/icsict.2008.4735048
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发表时间：
2008
期刊：
影响因子：
--
通讯作者：
Xianlong Hong
中科院分区：
文献类型：
--
作者：
Jiayi Liu;Sheqin Dong;Xianlong Hong
随着芯片复杂度和块密度的不断增加，传统的基于衬底噪声模型的衬底噪声优化工具将耗费一段难以承受的时间。此外，所有的工具都只着眼于降低总噪声，而忽略了模拟器件的特定约束，如对称性约束。本文首先证明了块偏好有向图（BPDG）在降低所有模拟块的噪声和以及对称块上的噪声梯度方面的有效性。然后，我们实现了BPDG的概念与角块列表（CBL），与噪声估计过程可以在线性时间内完成。实验结果表明，该方法可以大大提高最终布局的时间和质量。
With the continuous increase of chip complexity and blocks density, the conventional substrate noise optimization tools which are based on some substrate noise models will consume a period of unbearable time. Further more, all the tools only aim at decreasing the total noise but ignore the specific constraints of analog parts such as symmetry constraint. In this paper, we first prove the effectiveness of Block Preference Directed Graph (BPDG) to decrease both noise sum of all analog blocks and noise gradient on symmetrical blocks. Then we implement the concept of BPDG with Corner Block List (CBL), with which the noise estimation process can be finished in linear time. Finally, the experimental results prove that both the time and the quality of final placement can be greatly improved by our method.