A reliable Cu-Sn stack bonding technology for 3D-TSV packaging
A reliable Cu-Sn stack bonding technology for 3D-TSV packaging
复制标题
用于 3D-TSV 封装的可靠 Cu-Sn 堆叠键合技术
DOI：
10.1088/0268-1242/29/2/025003
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发表时间：
2014-02-01
影响因子：
1.9
通讯作者：
Liu, Sheng
中科院分区：
文献类型：
--
作者：
Lv, Yaping;Chen, Mingxiang;Liu, Sheng
介绍了3D-TSV封装中的Cu-Sn叠层键合技术，重点介绍了TSV（through silicon via）形成、硅片减薄、TSV电镀和Cu-Sn多层叠层键合等关键技术。首先，制作了一些带有TSV和Cu-Sn焊盘的样品芯片用于堆叠。然后，分别进行了有和无TSV的两种叠层键合实验。3-管芯、7-管芯和10-管芯堆叠被键合和组装。最后，通过剪切试验和拉伸试验对3D-TSV堆叠的键合强度进行了表征，并对堆叠模块的电学性能、热学性能和耐腐蚀性能进行了测试。所有测试结果表明，可靠的叠层键合技术可以用于3D集成应用。
In this paper, Cu-Sn stack bonding technology for 3D-TSV packaging was described; some key technologies such as TSV (through silicon via) formation, silicon wafer thinning, TSV electroplating and Cu-Sn multilayer stack bonding were introduced. First of all, some sample chips with TSV and Cu-Sn bonding pads were fabricated for stacking. Then, two kinds of stack bonding experiments with or without TSV were carried out, respectively. 3-die, 7-die, and 10-die stacks were bonded and assembled. Finally, the bonding strengths of 3D-TSV stacking were characterized by shear test and tensile test, and also the electrical properties, thermal properties and corrosion resistance of stacked module. All the test results suggested that the reliable stack bonding technology can be used for 3D integration applications.