Hardware-Accelerated Network Control Planes
Hardware-Accelerated Network Control Planes
复制标题
硬件加速网络控制平面
DOI：
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发表时间：
2018
期刊：
影响因子：
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通讯作者：
Laurent Vanbever
中科院分区：
文献类型：
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作者：
Edgar Costa Molero;Stefano Vissicchio;Laurent Vanbever
现代网络架构的一个设计原则似乎是一成不变的：基于软件的控制平面驱动基于硬件或软件的数据平面。我们认为，现在是时候重新审视这一原则后出现的可编程开关ASIC，可以运行复杂的逻辑线速率。我们探讨了通过将控制平面的一些任务直接卸载到网络硬件来加速控制平面的可能性和好处。我们表明，可编程数据平面确实足够强大，可以运行关键的控制平面任务，包括：故障检测和通知，连接检索，甚至基于策略的路由协议。我们在P4中实现了这样一个“硬件加速”控制平面的原型，并在案例研究中说明了它的好处。尽管有这些好处，但我们承认将任务卸载到硬件上并不是一颗银弹。我们讨论了它的权衡和局限性，并概述了未来的研究方向，硬件-软件协同设计的网络控制平面。
One design principle of modern network architecture seems to be set in stone: a software-based control plane drives a hardware- or software-based data plane. We argue that it is time to revisit this principle after the advent of programmable switch ASICs which can run complex logic at line rate. We explore the possibility and benefits of accelerating the control plane by offloading some of its tasks directly to the network hardware. We show that programmable data planes are indeed powerful enough to run key control plane tasks including: failure detection and notification, connectivity retrieval, and even policy-based routing protocols. We implement in P4 a prototype of such a "hardware-accelerated" control plane, and illustrate its benefits in a case study. Despite such benefits, we acknowledge that offloading tasks to hardware is not a silver bullet. We discuss its tradeoffs and limitations, and outline future research directions towards hardware-software co-design of network control planes.