FSA: An Efficient Fault-tolerant Systolic Array-based DNN Accelerator Architecture

FSA: An Efficient Fault-tolerant Systolic Array-based DNN Accelerator Architecture
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DOI:
10.1109/iccd56317.2022.00086
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发表时间:
2022-10
期刊:
2022 IEEE 40th International Conference on Computer Design (ICCD)
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通讯作者:
Yingnan Zhao;Ke Wang;A. Louri
Yingnan Zhao;Ke Wang;A. Louri
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其他
文献类型:
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作者:
Yingnan Zhao;Ke Wang;A. Louri

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随着深度神经网络(DNN)加速器的出现,永久性故障日益成为DNN硬件加速器面临的严峻挑战,因为它们会严重降低DNN的推理精度。最先进的工作通过向DNN加速器的中央计算阵列添加均匀冗余处理元素(PEs)或直接绕过有故障的pe来解决这个问题。然而,这样的设计会导致推理损失、额外的硬件成本和性能开销。此外,由于成本的原因,目前的设计只能处理有限数量的故障。在本文中,我们提出了一个基于容错收缩阵列的DNN加速器FSA,其目标是在存在永久故障的情况下保持DNN推理的准确性。提议的FSA的关键特征是一个统一的重新计算模块(RCM),它可以动态地重新计算所需的DNN计算,这些计算应该由故障pe以最小的延迟和功耗完成。仿真结果表明,与现有设计相比,该算法的推理精度损失降低了46%,执行时间提高了23%,能耗平均降低了35%。
With the advent of Deep Neural Network (DNN) accelerators, permanent faults are increasingly becoming a serious challenge for DNN hardware accelerator, as they can severely degrade DNN inference accuracy. The State-of-the-art works address this issue by adding homogeneous redundant Processing Elements (PEs) to the DNN accelerator’s central computing array, or bypassing faulty PEs directly. However, such designs induce inference loss, extra hardware cost, and performance overhead. Moreover, current designs are able to only deal with a limited number of faults due to costs. In this paper, we propose FSA, a Fault-tolerant Systolic Array-based DNN accelerator with the goal of maintaining DNN inference accuracy in the presence of permanent faults. The key feature of the proposed FSA is a unified re-computing module (RCM) that dynamically recalculates the required DNN computations that are supposed to be accomplished by faulty PEs with minimal latency and power consumption. Simulation results show that the proposed FSA reduces inference accuracy loss by 46%, improves execution time by 23%, and reduces energy consumption by 35% on average, as compared to existing designs.