Performance and VTH Stability in E-Mode GaN Fully Recessed MIS-FETs and Partially Recessed MIS-HEMTs With LPCVD-SiNx/PECVD-SiNx Gate Dielectric Stack
Performance and VTH Stability in E-Mode GaN Fully Recessed MIS-FETs and Partially Recessed MIS-HEMTs With LPCVD-SiNx/PECVD-SiNx Gate Dielectric Stack
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DOI:
10.1109/ted.2018.2850042
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发表时间:
2018-07
影响因子:
3.1
通讯作者:
Jiabei He;M. Hua;Zhaofu Zhang;K. J. Chen
中科院分区:
文献类型:
--
作者:
Jiabei He;M. Hua;Zhaofu Zhang;K. J. Chen
In this paper, we carried out a systematic comparison between the enhancement-mode GaN-based fully recessed metal-insulator-semiconductor field-effect transistors (MIS-FETs) and partially recessed MIS-high-electron-mobility transistors (MIS-HEMTs) with the same gate dielectric stack (LPCVD-SiNx/PECVD-SiNx) that has delivered promising long-term reliability and stability. Despite a moderately larger on-resistance ( ${R}_{ \mathrm{ON}}$ ), the MIS-FETs deliver superior ${V}_{\text {TH}}$ uniformity and thermal stability. Under long-term gate bias stress, both the MIS-HEMT and MIS-FET deliver similar small positive-bias temperature instability, while the negative-bias temperature instability of the MIS-HEMT is much larger than that of MIS-FET. The MIS-FET also delivers a higher ${V}_{\text {TH}}$ stability than the MIS-HEMT under dynamic gate bias stress. It is suggested that the differences in ${V}_{\text {TH}}$ stability mainly originate from the different spatial separation between the trap states and the conducting channel, with it being larger in MIS-HEMT than in MIS-FET.