Vidi: Record Replay for Reconfigurable Hardware

Vidi: Record Replay for Reconfigurable Hardware
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DOI:
10.1145/3582016.3582040
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发表时间:
2023-03
期刊:
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3
影响因子:
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通讯作者:
Gefei Zuo;Jiacheng Ma;Andrew Quinn;Baris Kasikci
Gefei Zuo;Jiacheng Ma;Andrew Quinn;Baris Kasikci
中科院分区:
其他
文献类型:
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作者:
Gefei Zuo;Jiacheng Ma;Andrew Quinn;Baris Kasikci

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开发人员正在转向异构计算设备,例如现场可编程阵列(FPGA),以加速数据中心和云计算工作负载。 FPGA启用快速原型制作,并应促进类似敏捷软件的开发工作流程,以解决正确的错误,性能问题和安全漏洞。不幸的是,硬件开发仍然没有支持敏捷硬件开发愿景所需的大量工具生态系统。记录和重播FPGA执行的能力将构成一个关键构建块,它将激发许多工具的开发,类似于记录/重播对软件的做法。但是,为FPGA建立实用的记录/重播工具是具有挑战性的。现有方法要么记录太多或太少的信息,因此无法支持现实世界执行。在本文中,我们介绍了Vidi,这是在硬件上运行的真实世界FPGA应用程序的第一个记录/重播系统。 VIDI基于这样的观察,即广泛使用的通信协议具有明确的输入/输出交易,可以从开发人员中隐藏特定于周期的信息,这比重量循环准确的记录/重播方法更有效地设计。 VIDI提出(1)交易确定性洞察力,以跟踪和强制在记录和重播之间仅对交易事件进行必要的顺序,以及(2)粗颗粒的输入记录机制以记录事务级别的信息。我们在亚马逊EC2 F1实例上评估VIDI,其中有10种应用程序和两个用例(调试,测试),发现它平均会导致低性能放缓(1.98%)和资源开销(5.48%),使其可用于现实世界中的实用性。
Developers are turning to heterogeneous computing devices, such as Field Programmable Gate Arrays (FPGAs), to accelerate data center and cloud computing workloads. FPGAs enable rapid prototyping and should facilitate an agile software-like development workflow to fix correctness bugs, performance issues, and security vulnerabilities. Unfortunately, hardware development still does not have a vast ecosystem of tools needed to support the agile hardware development vision. The capability to record and replay FPGA executions would constitute a key building block that will inspire the development of many tools, similar to what record/replay did for software. However, building a practical record/replay tool for FPGA is challenging; existing approaches either record too much or too little information and cannot support real-world executions. In this paper, we present VIDI, the first record/replay system for real-world FPGA applications running on hardware. VIDI is based on the observation that widely-used communication protocols have well-defined input/output transactions to hide cycle-specific information from developers, which enables a more efficient design than heavyweight cycle-accurate record/replay approaches. VIDI proposes (1) the transaction determinism insight to track and enforce only necessary orderings of transaction events across record and replay, and (2) the coarse-grained input recording mechanism to record transaction-level information. We evaluate VIDI on Amazon EC2 F1 instances with 10 applications and two use cases (debugging, testing) and find that it incurs on average low performance slowdown (1.98%) and resource overhead (5.48%), making it practical for real-world deployments.