PLL low pass filter design considering unified specification constraints
PLL low pass filter design considering unified specification constraints
复制标题
考虑统一规格约束的PLL低通滤波器设计
DOI：
10.1007/s10470-014-0312-2
复制
发表时间：
2014
影响因子：
1.4
通讯作者：
Guoan Wang
中科院分区：
文献类型：
--
作者：
Bo Jiang;T. Xia;Guoan Wang
合理配置低通滤波器(LPF)系数是决定锁相环电路性能的重要因素。大多数锁相环设计方法根据预选的环路带宽和相位裕度计算低通滤波系数，然后调整低通滤波参数以满足锁定时间和相位噪声等其他指标要求。这种设计方法通常涉及大量迭代模拟，这很耗时且效率不是很高。本文提出了一种通过考虑统一的锁相环特性约束来确定低通滤波系数的允许范围的解析方法。在确定了距离后，得到了清晰的指导，便于低通滤波的调谐和自适应锁相环的设计。为了验证模型的正确性，设计了一个电荷泵锁相环，并利用第三方锁相环仿真软件Cppsim对其进行了仿真。
To appropriately configure the low pass filter (LPF) coefficients plays an important role in determining phase locked loop circuit performance. Most phase locked loop (PLL) design methods calculate LPF coefficients based on preselected loop bandwidth, phase margin, and then adjust LPF parameters to meet other specification requirements, i.e. locking time and phase noise. Such design approaches typically involve a number of iterative simulations, which are time consuming and are not very efficient. In this paper, we develop an analytical method to determine the allowable range of LPF coefficient values by considering unified PLL specification constraints. With the range identified, a clear guidance is obtained to facilitate LPF tuning and adaptive PLL design. For model validation, a charge pump PLL is designed and simulated using a 3rd party PLL simulation program—Cppsim.