Blueshell: a platform for rapid prototyping of multiprocessor NoCs and accelerators
Blueshell: a platform for rapid prototyping of multiprocessor NoCs and accelerators
复制标题
Blueshell：多处理器 NoC 和加速器快速原型设计平台
DOI：
10.1145/2641361.2641379
复制
发表时间：
2013
期刊：
影响因子：
--
通讯作者：
N. Audsley
中科院分区：
文献类型：
--
作者：
G. Plumbridge;J. Whitham;N. Audsley
FPGA逻辑容量的快速增长使得多处理器片上网络（NoC）架构的原型成为可能。然而，这些复杂的架构的设计空间探索是非常耗时的FPGA设计的传统方法。
我们的论文解决了多处理器网络设计的挑战与Blueshell框架生成多处理器片上网络（NoC）和一个耦合的Java软件栈，Network-Chi。通过Blueshell，硬件由高级组件构成，包括使用简明Bluespec System Verilog的处理器和路由器。还提出了网络志软件框架，使编程的片上处理器在一个熟悉的Java风格，而不暴露低层次的系统编程的应用程序设计师。
我们证明，蓝壳系统与多达20个处理器可以在一个中等大小的FPGA上实现。还提供了一些分布式应用程序的性能数据。
The rapid increase in FPGA logic capacity has enabled the prototyping of multiprocessor Network-on-Chip (NoC) architectures. However, the design space exploration of these complex architectures is highly time consuming with traditional methodologies for FPGA design.
Our paper addresses the challenges of multiprocessor network design with the Blueshell framework for generating multiprocessor networks on chip (NoC) and a coupled Java software stack, Network-Chi. With Blueshell hardware is mconstructed from high-level components including processors and routers using concise Bluespec System Verilog. The Network-Chi software framework is also presented to enable programming the on-chip processors in a familiar Java style and without exposing the low-level systems programming to the application designer.
We demonstrate that Blueshell systems with as many as 20 processors can be implemented on a modestly sized FPGA. Performance figures for a selection of distributed applications are also provided.