32/28nm Educational Design Kit: Capabilities, deployment and future

32/28nm Educational Design Kit: Capabilities, deployment and future
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32/28nm 教育设计套件:功能、部署和未来

DOI:
10.1109/primeasia.2013.6731222
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发表时间:
2013
期刊:
2013 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia)
影响因子:
--
通讯作者:
E. Babayan
E. Babayan
中科院分区:
--
文献类型:
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作者:
R. Goldman;K. Bartleson;T. Wood;K. Kranen;V. Melikyan;E. Babayan

文献摘要

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介绍了一个支持32/28 nm设计流程的EDK,它包括所有必要的设计规则、模型、技术文件、验证和提取命令、脚本、符号库和PyCells。它还包括一个支持所有当代低功耗设计技术的数字标准单元库(DSCL);一个标准和特殊I/O单元库(IOSCL和IOSpCL);一组具有不同字和数据深度的存储器(SOM);一组低功耗存储器(SOM LP)和一个锁相环(PLL)。EDK的这些组件增强了用于教育和研究目的的任何类型的设计。虽然EDK不包含任何代工信息,但它允许在设计中实现接近真实的工艺的高精度32/28 nm技术。
An Educational Design Kit (EDK) which supports a 32/28nm design flow is described which includes all the necessary design rules, models, technology files, verification and extraction command decks, scripts, symbol libraries, and PyCells. It also includes a Digital Standard Cell Library (DSCL) which supports all contemporary low power design techniques; an Standard and Special I/O Cell Libraries (IOSCL and IOSpCL); a set of memories (SOM) with different word and data depths; a set of low-power memories (SOM LP) and a phase-locked loop (PLL). These components of the EDK augment any type of design for educational and research purposes. Though the EDK does not contain any foundry information, it allows 32/28nm technology with high accuracy close to real processes to be implemented in the designs.