Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
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DOI：
10.1109/micro.2007.30
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发表时间：
2007-12
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通讯作者：
N. Muralimanohar;R. Balasubramonian;N. Jouppi
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作者：
N. Muralimanohar;R. Balasubramonian;N. Jouppi
未来微处理器房地产的很大一部分将专用于12或13个缓存。这些片上的缓存将严重影响处理器的性能，功率耗散和热管理策略。有许多互连设计考虑因素会影响大型缓存的功率/性能/区域特征，例如电线模型（宽度/间距/中继器），信号策略（RC/dindinial/Transmine），路由器设计等。日期，没有分析工具将所有这些参数都考虑在内，以进行大型缓存的设计空间探索并估算一个最佳组织。在这项工作中，我们对仙人掌缓存建模工具实施了两个主要扩展，该工具着重于大型缓存的互连设计。首先，我们添加了建模不同类型的电线的能力，例如具有不同功率/延迟特性和差异低旋转总线的基于RC的电线。其次，我们添加了模拟非均匀高速缓存访问（NUCA）的能力。我们不仅采用最先进的设计空间探索核心，还通过考虑芯片网络争夺和更广泛的接线和路由选择来增强这种探索。我们提供了对新工具的验证分析（将以仙人掌6.0发布），并提出一个案例研究，以展示该工具如何改善建筑研究方法。
A significant part of future microprocessor real estate will be dedicated to 12 or 13 caches. These on-chip caches will heavily impact processor performance, power dissipation, and thermal management strategies. There are a number of interconnect design considerations that influence power/performance/area characteristics of large caches, such as wire models (width/spacing/repeaters), signaling strategy (RC/differential/transmission), router design, etc. Yet, to date, there exists no analytical tool that takes all of these parameters into account to carry out a design space exploration for large caches and estimate an optimal organization. In this work, we implement two major extensions to the CACTI cache modeling tool that focus on interconnect design for a large cache. First, we add the ability to model different types of wires, such as RC-based wires with different power/delay characteristics and differential low-swing buses. Second, we add the ability to model non-uniform cache access (NUCA). We not only adopt state-of-the-art design space exploration strategies for NUCA, we also enhance this exploration by considering on-chip network contention and a wider spectrum of wiring and routing choices. We present a validation analysis of the new tool (to be released as CACTI 6.0) and present a case study to showcase how the tool can improve architecture research methodologies.