Performance-oriented Cache Management Scheme based on A Retention State for Energy-harvesting Nonvolatile Processors

Performance-oriented Cache Management Scheme based on A Retention State for Energy-harvesting Nonvolatile Processors
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基于能量收集非易失性处理器保留状态的面向性能的缓存管理方案

DOI:
10.1016/j.future.2021.11.010
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发表时间:
2022
期刊:
Future Generation Computer Systems (CCF C)
影响因子:
--
通讯作者:
Jinhui Liu
Jinhui Liu
中科院分区:
其他
文献类型:
--
作者:
Yan Wang;Henian Fang;Linbo Long;Jinhui Liu

文献摘要

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在本文中,我们解决的挑战,频繁的备份和恢复操作与不稳定的能源供应的能量收集非易失性处理器(NVP)。为了解决这个问题,本文采用了一种保留状态,它可以允许系统将数据保留在易失性缓存中,以等待电源恢复,而不是立即备份数据。此外,在能量收集NVP中,重要的问题包括如何备份和恢复数据,如何执行缓存替换,以及如何将数据传输到该高速缓存的不同部分,以这种方式可以提高性能和能耗,并且可以保证成功的备份。因此,我们提出了一个面向性能的高速缓存管理计划的基础上的保留状态,以产生近最佳的数据迁移,替换和备份解决方案的应用程序在多项式时间。该方案采用两个能量阈值对数据进行预备份和备份,根据数据的保留状态减少备份和恢复操作。我们评估我们提出的算法的性能和能耗相比,双阈值SLC STT-RAM计划和变形缓存计划。评估表明,该方案可以实现18.58%和4.54%的平均能耗比SLC STT-RAM和变形缓存计划,分别具有相当的性能。实验结果还表明,与SLC STT-RAM和变形缓存方案相比,该算法的性能平均分别提高了17.90%和8.85%。
In this paper, we address the challenges of frequent backup and recovery operations associated with an unstable energy supply in energy-harvesting nonvolatile processors (NVPs). To address this problem, this paper adopts a retention state, which can allow the system to retain data in a volatile cache to wait for power recovery instead of immediately backing up the data. In addition, in an energy-harvesting NVP, important issues include how to back up and recover data, how to perform cache replacement, and how to transmit data to different parts of the cache in such a way that the performance and energy consumption can be improved and a successful backup can be guaranteed. Therefore, we propose a performance-oriented cache management scheme based on a retention state to generate near-optimal data migration, replacement and backup solutions for applications in polynomial time. This scheme uses two energy thresholds to pre-back up and back up data to reduce the backup and recovery operations according to the retention state. We evaluate the performance and energy consumption of our proposed algorithms in comparison with those of the dual-threshold SLC STT-RAM scheme and morphable cache scheme. The evaluation shows that the proposed scheme can achieve 18.58% and 4.54% lower average energy consumption than the SLC STT-RAM and morphable cache schemes, respectively, with comparable performance. The experimental results also show that compared with the SLC STT-RAM and morphable cache schemes, the proposed algorithm can achieve 17.90% and 8.85% performance improvement, respectively, on average.