Silicon Integrated 280 GHz Imaging Chipset With 4x4 SiGe Receiver Array and CMOS Source
Silicon Integrated 280 GHz Imaging Chipset With 4x4 SiGe Receiver Array and CMOS Source
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DOI：
10.1109/tthz.2015.2414826
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发表时间：
2015-05-01
影响因子：
3.2
通讯作者：
Hajimiri, Ali
中科院分区：
文献类型：
--
作者：
Sengupta, Kaushik;Seo, Dongjin;Hajimiri, Ali
在本文中，我们报道了一种集成的硅基主动成像芯片组，该芯片组带有0.13微米SiGe工艺的探测器阵列和工作在240-290 GHz范围内的CMOS基光源阵列。该芯片组在室温下运行，没有外部射频或光源、高阻硅透镜(HRSi)或波导或任何定制制造选项，例如高阻衬底或衬底减薄。接收器芯片由一个16像素的2-D阵列组成，尺寸为2.5 mm x 2.5 mm，并集成了天线。提出了一种电磁-有源电路协同设计方法，以确保与工作在截止频率以上的探测器的高效接口具有良好的阻抗匹配、接近最佳的噪声性能，同时抑制无透镜有损体硅衬底中的主要表面波模式。阵列性能在220-320 GHz的WR-3频段内表征。在260 GHz的设计频率下，所有像素的NEP保持在7.9PW/根赫兹-8.8PW/根赫兹之间。该成像芯片组由该二维探测器阵列芯片和一个尺寸为0.8 mm×0.8 mm的基于CMOS源阵列芯片组成。整个系统消耗的直流功率不到180兆瓦，是一个真正的集成解决方案。
In this paper, we report an integrated silicon-based active imaging chipset with a detector array in 0.13 mu m SiGe process and a CMOS-based source array operating in the 240-290 GHz range. The chipset operates at room-temperature with no external RF or optical sources, high-resistivity silicon lenses (HRSi) or waveguides or any custom fabrication options, such as high-resistivity substrates or substrate thinning. The receiver chip consists of a 2-D array of 16 pixels, measuring 2.5 mm x 2.5 mm with integrated antennas. An electromagnetic-active circuit co-design approach is carried out to ensure high-efficiency interface with detectors operating above cut-off frequencies with good impedance matching, near-optimal noise performance, while simultaneously suppressing the dominant surface-wave modes in a lensless lossy bulk silicon substrate. The array performance is characterized in the WR-3 band between 220-320 GHz. At the designed frequency of 260 GHz, the NEP of all pixels stays between 7.9 pW/root Hz-8.8 pW/root Hz. The imaging chipset consists of this 2D detector array chip and a CMOS-based source array chip measuring 0.8 mm x 0.8 mm. The entire system dissipates less than 180 mW of DC power, representing a truly integrated solution.