Boosting timestamp-based transactional memory by exploiting hardware cycle counters
Boosting timestamp-based transactional memory by exploiting hardware cycle counters
复制标题
通过利用硬件周期计数器来增强基于时间戳的事务内存
DOI：
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发表时间：
2013
期刊：
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通讯作者：
Michael F. Spear
中科院分区：
文献类型：
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作者：
Wenjia Ruan;Yujie Liu;Michael F. Spear
基于时间的事务存储器通常依靠共享存储器计数器来确保一致性。不幸的是，这样的计数器可能会成为瓶颈。在本文中，我们将介绍硬件周期计数器的属性，这些属性允许使用硬件周期计数器来代替共享内存计数器。然后，我们设计了利用x86周期计数器实现无瓶颈事务内存运行时系统的算法。我们还考虑了私有化安全性和硬件排序约束对算法的正确性、性能和通用性的影响。
Time-based transactional memories typically rely on a shared memory counter to ensure consistency. Unfortunately, such a counter can become a bottleneck. In this article, we identify properties of hardware cycle counters that allow their use in place of a shared memory counter. We then devise algorithms that exploit the x86 cycle counter to enable bottleneck-free transactional memory runtime systems. We also consider the impact of privatization safety and hardware ordering constraints on the correctness, performance, and generality of our algorithms.