HIPSR: A Digital Signal Processor for the Parkes 21-cm Multibeam Receiver
HIPSR: A Digital Signal Processor for the Parkes 21-cm Multibeam Receiver
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DOI：
10.1142/s2251171716410075
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发表时间：
2016-12
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影响因子：
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通讯作者：
D. Price;L. Staveley-Smith;M. Bailes;E. Carretti;A. Jameson;M. Jones;W. Straten;S. Schediwy
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作者：
D. Price;L. Staveley-Smith;M. Bailes;E. Carretti;A. Jameson;M. Jones;W. Straten;S. Schediwy
HIPSR（HI-Pulsar）是一个用于Parkes 21 cm多波束接收机的数字信号处理系统，与Parkes以前使用的系统相比，它提供了更大的瞬时带宽、更大的动态范围和更高的信号处理能力。额外的计算能力能够在宽带HI观测中实现更高的光谱分辨率，并在脉冲星勘测期间实时检测快速射电爆发。HIPSR使用异构架构，由基于FPGA的信号处理板组成，通过高速以太网连接到高性能计算节点。低级信号处理在基于FPGA的板上进行，更复杂的信号处理例程在基于GPU的计算节点上进行。HIPSR的开发是由两个主要科学目标驱动的：提供适合21厘米叠加和强度测绘实验的大带宽、高分辨率光谱;以及升级Berkeley-Parkes-Swinburne记录器，这是用于高时间分辨率宇宙巡天和脉冲星和河外射电爆发巡天的信号处理系统。
HIPSR (HI-Pulsar) is a digital signal processing system for the Parkes 21-cm Multibeam Receiver that provides larger instantaneous bandwidth, increased dynamic range, and more signal processing power than the previous systems in use at Parkes. The additional computational capacity enables finer spectral resolution in wideband HI observations and real-time detection of Fast Radio Bursts during pulsar surveys. HIPSR uses a heterogeneous architecture, consisting of FPGA-based signal processing boards connected via high-speed Ethernet to high performance compute nodes. Low-level signal processing is conducted on the FPGA-based boards, and more complex signal processing routines are conducted on the GPU-based compute nodes. The development of HIPSR was driven by two main science goals: to provide large bandwidth, high-resolution spectra suitable for 21-cm stacking and intensity mapping experiments; and to upgrade the Berkeley–Parkes–Swinburne Recorder (BPSR), the signal processing system used for the High Time Resolution Universe (HTRU) Survey and the Survey for Pulsars and Extragalactic Radio Bursts (SUPERB).