A flexible 32-channel time-to-digital converter implemented in a Xilinx Zynq-7000 field programmable gate array
A flexible 32-channel time-to-digital converter implemented in a Xilinx Zynq-7000 field programmable gate array
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DOI：
10.1016/j.nima.2016.11.031
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发表时间：
2017-03
影响因子：
1.4
通讯作者：
Yonggang Wang;J. Kuang;Chong Liu;Qiang Cao;Deng Li
中科院分区：
文献类型：
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作者：
Yonggang Wang;J. Kuang;Chong Liu;Qiang Cao;Deng Li
在Xilinx Zynq-7000现场可编程门阵列（FPGA）中实现了一种高性能的多通道时间数字转换器（TDC）。它可以灵活地配置为32个TDC通道（9.9 ps时间间隔RMS精度）、16个TDC通道（6.9 ps RMS精度）或8个TDC通道（5.8 ps RMS精度）。所有TDC都具有380 M样本/秒的测量吞吐量和2.63 ns的测量死区时间。对TDC通道的性能一致性和温度依赖性进行了评价。由于Zynq-7000 FPGA系列在单个器件中集成了功能丰富的基于ARM的双核处理系统和28 nm Xilinx可编程逻辑，因此在其上实现高性能TDC将使该平台在时间测量相关应用中得到更广泛的应用。
A high performance multi-channel time-to-digital converter (TDC) is implemented in a Xilinx Zynq-7000 field programmable gate array (FPGA). It can be flexibly configured as either 32 TDC channels with 9.9 ps time-interval RMS precision, 16 TDC channels with 6.9 ps RMS precision, or 8 TDC channels with 5.8 ps RMS precision. All TDCs have a 380 M Samples/second measurement throughput and a 2.63 ns measurement dead time. The performance consistency and temperature dependence of TDC channels are also evaluated. Because Zynq-7000 FPGA family integrates a feature-rich dual-core ARM based processing system and 28 nm Xilinx programmable logic in a single device, the realization of high performance TDCs on it will make the platform more widely used in time-measuring related applications.