Silicon evaluation of logic proximity bridge patterns
Silicon evaluation of logic proximity bridge patterns
复制标题
逻辑邻近桥模式的芯片评估
DOI：
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发表时间：
2006
期刊：
影响因子：
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通讯作者：
S. Chakravarty
中科院分区：
文献类型：
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作者：
Eric N. Tran;Vishwashanth R. Kasulasrinivas;S. Chakravarty
在仿真研究的基础上，提出了逻辑邻近桥（LPB）模式作为现实桥和n-检测模式的替代方案。在这里，硅评估的逻辑接近桥模式，在移动的芯片组产品，提出。结果表明，这些模式显着增加类扫描的余波以上和超越固定的模式，包括单负载和多负载模式，具有非常高的固定故障覆盖率。此外，它指出了使用多个故障模型生成ATPG模式的有用性，LPB故障是其中之一
Logic proximity bridge (LPB) patterns were proposed as an alternative to realistic bridge and n-detect patterns based on simulation studies. Here, silicon evaluation of logic proximity bridge patterns, on a mobile chipset product, is presented. Results show these patterns to significantly increase the class scan fallout above and beyond stuck-at patterns, consisting of single load and multi-load patterns, with very high stuck-at fault coverage. In addition it points to the usefulness of generating ATPG patterns using multiple fault models, LPB faults being one of them