Power-Optimized Temperature-Distributed Digital Data Link
Power-Optimized Temperature-Distributed Digital Data Link
复制标题
功率优化的温度分布式数字数据链路
DOI：
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发表时间：
2015
影响因子：
1.8
通讯作者：
J. Bardin
中科院分区：
文献类型：
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作者：
Prasana Ravindran;Su;D. Gupta;A. Inamdar;V. Dotsenko;S. Sarwana;J. Bardin
Interfacing superconducting rapid single flux quantum logic with room temperature electronics requires the development of low-power semiconductor circuitry capable of operating at tens of Gb/s while maintaining sufficient signal to noise to achieve acceptable bit-error-rates. Such data-links must operate with sufficiently low power consumption to permit tens to hundreds of parallel channels to coexist in a single cryostat. This requires a careful trade-off between the power and noise performance of the cryogenically cooled digital amplifiers. Previously demonstrated ultra low-power cryogenic-to-room temperature digital data links have been limited to data rates on the order of a few Gb/s. In this paper we demonstrate a temperature distributed amplifier chain optimized for 30 Gb/s data transmission and consuming just 140 microwatts at 4 K.
