Quantifying Memory Underutilization in HPC Systems and Using it to Improve Performance via Architecture Support
Quantifying Memory Underutilization in HPC Systems and Using it to Improve Performance via Architecture Support
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DOI：
10.1145/3352460.3358267
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发表时间：
2019-10
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影响因子：
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通讯作者：
Gagandeep Panwar;Da Zhang;Yihan Pang;M. Dahshan;Nathan Debardeleben;B. Ravindran;Xun Jian
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文献类型：
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作者：
Gagandeep Panwar;Da Zhang;Yihan Pang;M. Dahshan;Nathan Debardeleben;B. Ravindran;Xun Jian
系统的内存大小通常由具有最高内存需求的最坏情况工作负载决定；当系统没有运行最坏的工作负载时，这通常会导致内存利用率不足。认识到这个内存利用不足的问题，许多先前的工作已经研究了内存利用率，并探讨了如何在云环境下提高内存利用率。在本文中，我们首次在高性能计算系统背景下对系统级内存利用率进行了大规模研究；通过对四个HPC系统进行700万个机器小时的测量，我们发现HPC系统中的内存利用率不足比云系统严重得多。随后，我们还对架构技术进行了首次探索，以提高HPC系统的内存利用率。我们建议通过对操作系统的新架构支持，将每个计算节点当前未使用的内存暴露给其CPU。这使得许多新的微架构技术能够利用大量的空闲内存透明地提高微架构性能，而不需要任何用户代码修改或重新编译；我们将其称为Free-memory-aware Microarchitecture Techniques （fmt）。然后，我们提出了一个FMT的详细例子——自由内存感知内存复制（FMR）。在五个HPC基准测试套件中，与现代内存系统的高度优化基准相比，FMR平均提供了13%的性能和8%的系统级能源改进。为了验证仿真报告的性能优势，我们在实际系统中对FMR进行了仿真，发现仿真结果与实际系统仿真结果非常吻合。本文最后讨论了其他可能的fmt及其在其他类型系统中的适用性。
A system's memory size is often dictated by worst-case workloads with highest memory requirements; this causes memory to be underutilized in the common case when the system is not running its worst-case workloads. Cognizant of this memory underutilization problem, many prior works have studied memory utilization and explored how to improve it in the context of cloud. In this paper, we perform the first large-scale study of system-level memory utilization in the context of HPC systems; through seven million machine-hours of measurements across four HPC systems, we find memory underutilization in HPC systems is much more severe than in cloud. Subsequently, we also perform the first exploration of architectural techniques to improve memory utilization specifically for HPC systems. We propose exposing each compute node's currently unused memory to its CPU(s) via novel architectural support for OS. This can enable many new microarchitecture techniques that use the abundant free memory to boost microarchitecture performance transparently without requiring any user code modification or recompilation; we refer to them as Free-memory-aware Microarchitecture Techniques (FMTs). We then present a detailed example of an FMT -- Free-memory-aware Memory Replication (FMR). On average across five HPC benchmark suites, FMR provides 13% performance and 8% system-level energy improvement compared to a highly optimized baseline representative of modern memory systems. To check the performance benefits our simulation reports, we emulated FMR in a real system and found close corroboration between simulation results and real-system emulation results. The paper ends by discussing other possible FMTs and applicability to other types of systems.