New approaches for in-system debug of behaviorally-synthesized FPGA circuits
New approaches for in-system debug of behaviorally-synthesized FPGA circuits
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行为综合 FPGA 电路系统内调试的新方法
DOI：
10.1109/fpl.2014.6927495
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发表时间：
2014
期刊：
影响因子：
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通讯作者：
B. Hutchings
中科院分区：
文献类型：
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作者：
Joshua S. Monson;B. Hutchings
本文提出了对高级综合生成的硬件进行系统内、基于跟踪的调试的新方法。这些方法包括使用事件可观察性端口 (EOP)，该端口提供最终硬件中源级事件的可观察性。我们还建议使用称为事件可观察性缓冲区 (EOB) 的小型独立跟踪缓冲区来通过 EOP 跟踪事件。 EOB 包括数据存储使能信号，允许在逐个 EOB 的基础上做出逐周期存储决策。这种方法会导致不同跟踪缓冲区中捕获的事件的时序关系丢失。提出了两种恢复这些关系的方法。最后，我们提出了一个案例研究，证明 EOB 跟踪策略的可行性和有效性。
This paper present new approaches for in-system, trace-based debug of High-Level Synthesis-generated hardware. These approaches include the use of Event Observability Ports (EOP) that provide observability of source-level events in the final hardware. We also propose the use of small, independent trace buffers called Event Observability Buffers (EOB) for tracing events through EOPs. EOBs include a data storage enable signal that allows cycle-by-cycle storage decisions to be made on an EOB-by-EOB basis. This approach causes the timing relationships of events captured in different trace buffers to be lost. Two methods are presented for recovering these relationships. Finally, we present a case study that demonstrates the feasibility and effectiveness of an EOB trace strategy.