Implementation of EAX mode of operation for FPGA bitstream encryption and authentication
Implementation of EAX mode of operation for FPGA bitstream encryption and authentication
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FPGA 比特流加密和认证的 EAX 操作模式的实现
DOI：
10.1109/fpt.2005.1568588
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发表时间：
2005
期刊：
影响因子：
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通讯作者：
K. Gaj
中科院分区：
文献类型：
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作者：
Milind M. Parelkar;K. Gaj
为了提供FPGA的安全远程重构能力，FPGA比特流在其通过任何公共网络传输期间需要被加密和认证。比特流加密已经在一些现代FPGA系列中实现，例如Xilinx Virtex II。当前一代FPGA缺乏的一个重要功能是加密验证比特流真实性的能力。在本文中，我们提出了使用高级加密标准（AES）的EAX操作模式的FPGA比特流的联合加密和认证，使用一个单一的密码引擎。我们证明和量化的优势，这种方法相比，一个通用的计划依赖于不同的算法和不同的密码引擎执行这两个操作
In order to provide a capability for secure remote reconfiguration of FPGAs, FPGA bitstream needs to be encrypted and authenticated during its transmission through any public network. Bitstream encryption is already implemented in a few modern FPGA families, such as Xilinx Virtex II. An important feature lacking in the current generation of FPGAs is the ability to cryptographically verify the authenticity of the bitstream. In this paper, we propose the use of the EAX mode of operation of advanced encryption standard (AES) for a joint encryption and authentication of the FPGA bitstream, using a single cipher engine. We demonstrate and quantify the advantages of this method compared to a generic scheme relying on different algorithms and different cryptographic engines for performing both operations