BAG: A Process-Portable Framework for Generator-based AMS Circuit Design
BAG: A Process-Portable Framework for Generator-based AMS Circuit Design
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BAG：基于发生器的 AMS 电路设计的可移植过程框架
DOI：
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发表时间：
2018
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通讯作者：
E. Alon
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文献类型：
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作者：
Eric Y. Chang;Nathan Narevsky;K. Settaluri;E. Alon
我们推出 BAG2，这是一个用于开发过程便携式模拟和混合信号 (AMS) 电路发生器的框架。此类生成器是参数化设计程序，可为给定输入规范的电路生成原理图、布局和验证测试台。本文通过在 BAG2 中引入通用 AMS 电路验证框架以及两个新的布局引擎 XBase 和 Laygo 来扩展之前的工作，从而实现工艺便携式布局生成器的开发。我们开发了各种复杂的电路发生器作为驱动示例，包括时间交错 SAR ADC 和 SerDes 收发器前端。这些设计的实例已采用 TSMC 16nm FFC 工艺生产；然而，我们通过展示在各种技术节点（包括 TSMC 28nm、TSMC 16nm、GLOBALFOUNDRIES 45nm RF-SOI、ST 28nm FD-SOI 和 GLOBALFOUNDRIES 22nm FDX）中生成的电路（使用单一方法代码库和仅适用于特定工艺的原语）来验证我们的工艺可移植性声明。
We present BAG2, a framework for the development of process-portable Analog and Mixed Signal (AMS) circuit generators. Such generators are parametrized design procedures that produce schematics, layouts, and verification testbenches for a circuit given input specifications. This paper expands on previous work by introducing a universal AMS circuit verification framework into BAG2, as well as two new layout engines, XBase and Laygo, that enable development of process-portable layout generators. We have developed various complex circuit generators as driving examples, including a time-interleaved SAR ADC and a SerDes transceiver frontend. Instances of these designs have been produced in a TSMC 16nm FFC process; we however verify our claims of process portability by presenting circuits generated (using a single methodology code-base and only primitives adapted to the specific process) in various technology nodes, including TSMC 28nm, TSMC 16nm, GLOBALFOUNDRIES 45nm RF-SOI, ST 28nm FD-SOI, and GLOBALFOUNDRIES 22nm FDX.