Modeling Low-k Dielectric Breakdown to Determine Lifetime Requirements
Modeling Low-k Dielectric Breakdown to Determine Lifetime Requirements
复制标题
对低 k 电介质击穿进行建模以确定寿命要求
DOI：
10.1109/mdt.2009.151
复制
发表时间：
2009
影响因子：
--
通讯作者：
L. Milor
中科院分区：
文献类型：
--
作者：
M. Bashir;L. Milor
低介电常数介质击穿和应力迁移已成为片上互连线的新的磨损源。本文分析了45纳米测试芯片的统计数据，并构建了一种方法来确定工艺变化下的低k材料的寿命。
Low-k dielectric breakdown and stress migration have emerged as new sources of wearout for on-chip interconnect. This article analyzes statistical data from a 45-nm test chip and constructs a methodology to determine the lifetime of low-k materials under process variations.