Chip multi-processor scalability for single-threaded applications
Chip multi-processor scalability for single-threaded applications
复制标题
单线程应用的芯片多处理器可扩展性
DOI：
10.1145/1105734.1105741
复制
发表时间：
2005
期刊：
影响因子：
--
通讯作者：
D. Connors
中科院分区：
文献类型：
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作者：
Neil Vachharajani;M. Iyer;C. Ashok;Manish Vachharajani;David I. August;D. Connors
单局部处理器性能的指数增长已经开始放缓。设计人员在管理热，功率和电效应时无法扩展性能。此外，设计复杂性限制了可以设计成本合理的整体处理器的大小。行业的回应是朝着芯片多处理器架构（CMP）迈进。这些体系结构是由使用新设计过程提供的模具区域的复制处理器组成的。尽管这种方法减轻了设计复杂性，功率和电动效果的问题，但它并没有直接改善现代或将来的单线程应用程序的性能。本文研究了在这些方面利用并行性应用于这些应用程序的可伸缩性潜力。 CMP平台。该论文探讨了未修改的顺序应用中可用的总并行性，然后检查了在CMP机器上利用这种并行性的可行性。使用此分析的结果，本文预测，使用程序中的“固有”并行性CMP可以维持用户在新处理器中获得的绩效改进，只有6 - 8年，只要出现了许多成功的并行化工作。鉴于这种前景，论文主张探索方法，这些方法学是在计划的“内在”限制之外实现并行性的。
The exponential increase in uniprocessor performance has begun to slow. Designers have been unable to scale performance while managing thermal, power, and electrical effects. Furthermore, design complexity limits the size of monolithic processors that can be designed while keeping costs reasonable. Industry has responded by moving toward chip multi-processor architectures (CMP). These architectures are composed from replicated processors utilizing the die area afforded by newer design processes. While this approach mitigates the issues with design complexity, power, and electrical effects, it does nothing to directly improve the performance of contemporary or future single-threaded applications.This paper examines the scalability potential for exploiting the parallelism in single-threaded applications on these CMP platforms. The paper explores the total available parallelism in unmodified sequential applications and then examines the viability of exploiting this parallelism on CMP machines. Using the results from this analysis, the paper forecasts that CMPs, using the "intrinsic" parallelism in a program, can sustain the performance improvement users have come to expect from new processors for only 6-8 years provided many successful parallelization efforts emerge. Given this outlook, the paper advocates exploring methodologies which achieve parallelism beyond this "intrinsic" limit of programs.