A Synthesis Method for Power-Efficient Integrated Optical Logic Circuits Towards Light Speed Processing
A Synthesis Method for Power-Efficient Integrated Optical Logic Circuits Towards Light Speed Processing
复制标题
一种面向光速处理的高能效集成光学逻辑电路的综合方法
DOI：
10.1109/isvlsi49217.2020.000-9
复制
发表时间：
2020
期刊：
影响因子：
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通讯作者：
M. Notomi
中科院分区：
文献类型：
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作者：
R. Matsuo;Jun Shiomi;T. Ishihara;H. Onodera;A. Shinya;M. Notomi
基于集成纳米光子学的光学逻辑电路由于其超高速操作而吸引了极大的兴趣。然而，传统的光逻辑电路的功耗与目标逻辑功能的输入数量成指数关系。本文提出了一种综合方法，降低功耗的多项式数量的输入，同时利用高速性质。我们的方法使用光电（OE）转换器将目标逻辑功能划分为多个子功能。每个子功能具有比原始功能的输入数量更少的输入数量，这使得能够指数地降低由表示子功能的光学逻辑电路消耗的功率。所提出的综合方法可以减轻OE转换器的延迟开销，通过并行化的子功能。我们将所提出的综合方法应用于ISCAS'85基准电路。基于二进制判决图（BDD）的传统电路的功耗比用该方法合成的光逻辑电路的功耗至少大3个数量级。所提出的方法将功耗降低到约100 mW。所提出的方法合成的电路的延迟保持小于四倍的传统的BDD为基础的电路的延迟。
Optical logic circuits based on integrated nanophotonics attract significant interest due to their ultra-high-speed operation. However, the power dissipation of conventional optical logic circuits is exponential to the number of inputs of target logic functions. This paper proposes a synthesis method reducing power dissipation to a polynomial order of the number of inputs while exploiting the high-speed nature. Our method divides the target logic function into multiple sub-functions with Optical-to-Electrical (OE) converters. Each sub-function has a smaller number of inputs than that of the original function, which enables to exponentially reduce the power dissipated by an optical logic circuit representing the sub-function. The proposed synthesis method can mitigate the OE converter delay overhead by parallelizing sub-functions. We apply the proposed synthesis method to the ISCAS'85 benchmark circuits. The power consumption of the conventional circuits based on the Binary Decision Diagram (BDD) is at least three orders of magnitude larger than that of the optical logic circuits synthesized by the proposed method. The proposed method reduces the power consumption to about 100 mW. The delay of the circuits synthesized by the proposed method is kept less than four times the delay of the conventional BDD-based circuit.
基于 BDD 的光逻辑电路综合探索波分复用
DOI：
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发表时间：
2019
期刊：
影响因子：
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作者：
Ryosuke Matsuo;Jun Shiomi;Tohru Ishihara;Hidetoshi Onodera;Akihiko Shinya;Masaya Notomi
通讯作者：
Masaya Notomi
使用集成纳米光子学对大型扇入光学逻辑电路进行多级优化
DOI：
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发表时间：
2018
期刊：
影响因子：
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作者：
Takumi Egawa;Tohru Ishihara;Hidetoshi Onodera;Akihiko Shinya;Shota Kita;Kengo Nozaki;Kenta Takata;Masaya Notomi
通讯作者：
Masaya Notomi