An analog circuit analysis method by node elimination
An analog circuit analysis method by node elimination
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DOI:
10.1007/s10470-021-01931-x
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发表时间:
2021-08
影响因子:
1.4
通讯作者:
G. Shi
中科院分区:
文献类型:
--
作者:
G. Shi
This paper introduces a node elimination method for analog circuit analysis. It is useful for manually deriving the transfer functions of small active circuit cells in analog integrated circuit design. This method is essentially a variant of Gaussian elimination and can be established based on the driving point impedance method. By successively reducing the circuit size, a circuit can be easily solved as soon as all internal nodes are eliminated. Examples are provided to illustrate the analysis steps.