An analog circuit analysis method by node elimination

An analog circuit analysis method by node elimination
复制标题

DOI:
10.1007/s10470-021-01931-x
复制
发表时间:
2021-08
影响因子:
1.4
通讯作者:
G. Shi
G. Shi
中科院分区:
工程技术4区
文献类型:
--
作者:
G. Shi

文献摘要

相似文献

本文介绍了一种模拟电路分析的节点消除方法。它对于在模拟集成电路设计中手动导出小型有源电路单元的传递函数非常有用。该方法本质上是高斯消去法的变体,可以基于驱动点阻抗法建立。通过逐步减小电路尺寸,只要消除所有内部节点,就可以轻松求解电路。提供示例来说明分析步骤。
This paper introduces a node elimination method for analog circuit analysis. It is useful for manually deriving the transfer functions of small active circuit cells in analog integrated circuit design. This method is essentially a variant of Gaussian elimination and can be established based on the driving point impedance method. By successively reducing the circuit size, a circuit can be easily solved as soon as all internal nodes are eliminated. Examples are provided to illustrate the analysis steps.