Posit NPB: Assessing the Precision Improvement in HPC Scientific Applications
Posit NPB: Assessing the Precision Improvement in HPC Scientific Applications
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Posit NPB：评估 HPC 科学应用的精度改进
DOI：
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发表时间：
2019
期刊：
影响因子：
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通讯作者：
S. Markidis
中科院分区：
文献类型：
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作者：
Steven W. D. Chien;I. Peng;S. Markidis
浮点操作可以显着影响大型平行系统上科学应用的准确性和性能。最近，新兴的浮点格式称为POSIT，引起了人们的注意，作为标准IEEE浮点格式的替代方案，因为它可以使用相同数量的位比IEEE格式更高的精度。在这项工作中，我们首先通过提供了32位的NAS并行基准（NPB）套件来探讨在代表性HPC应用程序中编码的可行性。然后，与IEEE 754格式相比，我们评估了不同HPC内核的准确性提高。我们的结果表明，对于所有经过测试的内核和代理应用程序，使用Potit编码可实现优化精度，范围从0.6到1.4个小数。此外，我们量化了当前软件实现POSIT编码为4x-19x IEEE 754硬件实现的开销。我们的研究强调了硬件实施位置的潜力，以使广泛的HPC应用程序受益。
Floating-point operations can significantly impact the accuracy and performance of scientific applications on large-scale parallel systems. Recently, an emerging floating-point format called Posit has attracted attention as an alternative to the standard IEEE floating-point formats because it could enable higher precision than IEEE formats using the same number of bits. In this work, we first explored the feasibility of Posit encoding in representative HPC applications by providing a 32-bit Posit NAS Parallel Benchmark (NPB) suite. Then, we evaluate the accuracy improvement in different HPC kernels compared to the IEEE 754 format. Our results indicate that using Posit encoding achieves optimized precision, ranging from 0.6 to 1.4 decimal digit, for all tested kernels and proxy-applications. Also, we quantified the overhead of the current software implementation of Posit encoding as 4x-19x that of IEEE 754 hardware implementation. Our study highlights the potential of hardware implementations of Posit to benefit a broad range of HPC applications.
DOI：
10.1177/1094342010391989
发表时间：
2011-02-01
影响因子：
3.1
作者：
Dongarra, Jack;Beckman, Pete;Yelick, Kathy
通讯作者：
Yelick, Kathy