RHBD techniques for mitigating effects of single-event hits using guard-gates
RHBD techniques for mitigating effects of single-event hits using guard-gates
复制标题
DOI：
10.1109/tns.2005.860719
复制
发表时间：
2005-12
影响因子：
1.8
通讯作者：
A. Balasubramanian;B. Bhuva;J. D. Black;L. Massengill
中科院分区：
文献类型：
--
作者：
A. Balasubramanian;B. Bhuva;J. D. Black;L. Massengill
Hardening-by-design techniques to mitigate the effect of single-event transients (SET) using guard-gates are developed. Design approaches for addressing combinational logic hits and storage cell hits are presented. Simulation results show that the designs using guard-gates are less susceptible to single-event hits. Area, power, and speed penalty for guard-gate designs for combinational logic are found to be minimal. For latches, the area penalty is higher but speed penalty is minimal.
