Digital PLL lock-detection circuit
Digital PLL lock-detection circuit
复制标题
数字PLL锁定检测电路
DOI：
10.1049/el:19880600
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发表时间：
1988
影响因子：
1.1
通讯作者：
R. Dulk
中科院分区：
文献类型：
--
作者：
R. Dulk
描述了一种数字锁定检测电路，它可以与所有已知的顺序相位检测器结合使用。其工作原理基于周跳检测，这是PLL的可能解锁定义之一。因此，锁相的定义进行了审查。所提出的电路还与广泛使用的PLL集成电路的内置相位检测器组合，作为可靠的锁定检测器。
A digital lock detection circuit is described which can be used in combination with all known sequential phase detectors. The principle of operation is based on the detection of cycle slips, which is one of the possible unlock definitions of a PLL. Therefore definitions of phaselock are reviewed. The proposed circuit acts also in combination with the built-in phase detectors of a widely used PLL integrated circuit as a reliable lock detector.