Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time
Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time
复制标题
连续时间内的节能混合模拟/数字近似计算
DOI：
10.1109/jssc.2016.2543729
复制
发表时间：
2016
影响因子：
5.4
通讯作者：
Y. Tsividis
中科院分区：
文献类型：
--
作者：
Ning Guo;Yipeng Huang;T. Mai;Sharvil Patil;Chi Cao;Mingoo Seok;S. Sethumadhavan;Y. Tsividis
我们提出了一个单元，进行连续时间混合近似计算，其中模拟和数字信号的连续时间的函数。我们的65 nm CMOS原型系统能够求解高达4阶的非线性微分方程，并可扩展到更高阶。非线性函数由可编程、无时钟、连续时间8位混合架构（ADC + SRAM + DAC）产生。数字辅助校准用于所有模拟/混合信号模块。与现有技术相比，我们的芯片可以实现任意非线性，并实现16倍的低功耗，这要归功于技术扩展和AB类模拟模块的广泛使用。通常情况下，该单元的计算精度约为0.5%至5% RMS，求解时间从1 μs到几百μs不等，总计算能量从1 nJ到几百nJ不等，具体取决于方程的细节。与现代微控制器获得的相同RMS误差相比，在计算速度和能量（分别超过两个数量级和一个数量级）方面观察到非常显著的优势。
We present a unit that performs continuous-time hybrid approximate computation, in which both analog and digital signals are functions of continuous time. Our 65 nm CMOS prototype system is capable of solving nonlinear differential equations up to 4th order, and is scalable to higher orders. Nonlinear functions are generated by a programmable, clockless, continuoustime 8-bit hybrid architecture (ADC + SRAM + DAC). Digitally assisted calibration is used in all analog/mixed-signal blocks. Compared to the prior art, our chip makes possible arbitrary nonlinearities and achieves 16× lower power dissipation, thanks to technology scaling and extensive use of class-AB analog blocks. Typically, the unit achieves a computational accuracy of about 0.5% to 5% RMS, solution times from a fraction of 1 μs to several hundred μs, and total computational energy from a fraction of 1 nJ to hundreds of nJ, depending on equation details. Very significant advantages are observed in computational speed and energy (over two orders of magnitude and over one order of magnitude, respectively) compared to those obtained with a modern microcontroller for the same RMS error.