Kernel analysis for architecture design trade off in convolution-based image filtering
Kernel analysis for architecture design trade off in convolution-based image filtering
复制标题
基于卷积的图像过滤中架构设计权衡的内核分析
DOI：
--
复制
发表时间：
2012
期刊：
影响因子：
--
通讯作者：
P. Berger
中科院分区：
文献类型：
--
作者：
J. Y. Mori;C. Llanos;P. Berger
为了改善图像处理架构的设计权衡，本工作提出了一些基于卷积的图像滤波的核分析。为了识别对称性，并允许开发替代架构，从而有助于降低功耗和/或FPGA资源，维持或提高整体系统吞吐量，对一些知名的滤波器内核进行了分析。分析了可分离核技术，开发了两种体系结构并进行了测试。此外，还开发了一种基于重叠核的技术，并对其进行了分析和测试。所有架构都使用Altera Quartus II EDA软件实现和合成，并在四个实时图像处理平台上进行原型设计。这些平台由一个CMOS相机、四个Terasic FPGA开发套件（带有Altera器件）和一个LCD组成。综合、仿真和实时结果表明，这种架构适合这种设计权衡。
Intending to improve design trade offs in image processing architectures this work presents some kernel analysis for convolution-based image filtering. Some well-known filter kernels have been analyzed in order to identify symmetries and to allow the development of alternative architectures that can contribute to reduce power consumption and/or FPGA resources, maintaining or improving the overall system throughput. The separable kernel technique is also analyzed, and two architectures were developed and tested. Additionally, a technique based on overlapping kernels have been developed, analyzed and tested. All architectures were implemented and synthesized using Altera Quartus II EDA software and prototyped in four real-time image processing platforms. These platforms are composed by a CMOS camera, four Terasic FPGA development kits (with Altera devices) and an LCD. Synthesis, simulations and real-time results show the suitability of such architectures for this kind of design trade off.